A CMOS imager circuit includes a focal plane array of pixel cells, each one of the cells including a photosensor, for example, a photogate, photoconductor or a photodiode overlying a substrate for accumulating photo-generated charge in the underlying portion of the substrate. Each pixel cell has a charge storage region, formed on or in the substrate, which is connected to the gate of an output transistor that is part of a readout circuit. The charge storage region may be constructed as a floating diffusion region. In some imager circuits, each pixel may include at least one electronic device such as a transistor for transferring charge from the photosensor to the storage region and one device, also typically a transistor, for resetting the storage region to a predetermined charge level prior to charge transference.
In a CMOS imager, the active elements of a pixel cell perform the necessary functions of: (1) photon to charge conversion; (2) accumulation of image charge; (3) resetting the storage region to a known state before the transfer of charge to it; (4) transfer of charge to the storage region accompanied by charge amplification; (5) selection of a pixel for readout; and (6) output and amplification of a signal representing pixel charge. Photo charge may be amplified when it moves from the initial charge accumulation region to the storage region. The charge at the storage region is typically converted to a pixel output voltage by a source follower output transistor.
CMOS imagers of the type discussed above are generally known as discussed, for example, in U.S. Pat. No. 6,140,630, U.S. Pat. No. 6,376,868, U.S. Pat. No. 6,310,366, U.S. Pat. No. 6,326,652, U.S. Pat. No. 6,204,524 and U.S. Pat. No. 6,333,205, assigned to Micron Technology, Inc., which are hereby incorporated by reference in their entirety.
A typical four transistor (4T) CMOS image pixel 10 is shown in FIG. 1. The pixel 10 includes a photosensor 12 (e.g., photodiode, photogate, etc.), transfer transistor 14, floating diffusion region FD, reset transistor 16, source follower transistor 18 and row select transistor 20. The photosensor 12 is connected to the floating diffusion region FD by the transfer transistor 14 when the transfer transistor 14 is activated by a transfer gate control signal TX.
The reset transistor 16 is connected between the floating diffusion region FD and an array pixel supply voltage Vaa_pix. A reset control signal RST is used to activate the reset transistor 16, which resets the floating diffusion region FD to the array pixel supply voltage Vaa_pix level as is known in the art.
The source follower transistor 18 has its gate connected to the floating diffusion region FD and is connected between the array pixel supply voltage Vaa_pix and the row select transistor 20. The source follower transistor 18 converts the charge stored at the floating diffusion region FD into an electrical output voltage signal Vout. The row select transistor 20 is controllable by a row select signal SEL for selectively connecting the source follower transistor 18 and its output voltage signal Vout to a column line 22 of a pixel array.
An important performance characteristic of any imager is its dynamic range. A large dynamic range is desirable in applications for sensing low light signals and capturing images with large variations in illuminance or brightness. In particular, the dynamic range of an imager can be defined as the ratio of the minimum illuminance the imager detects under saturation to the illuminance the imager detects at signal-to-noise ratio (SNR) equal to one. The dynamic range of a scene can also be expressed as the ratio of its highest illumination level to its lowest illumination level.
Intrascene dynamic range refers to the range of incident signal that can be accommodated by an imager in a single frame of image data. Examples of scenes that generate high dynamic range incident signals include an indoor room with outdoor window, outdoor mixed shadow and bright sunshine, night time scenes combining artificial lighting and shadows, and in automotive context, an auto entering or about to leave a tunnel or shadowed area on a bright day.
Many different types of approaches for creating imaging devices with high dynamic range have been described in the literature. A common denominator of most approaches relies on companding (i.e., signal values are rounded on a non-linear scale, compressed and then expanded using the same non-linear scale) within the pixel by having either a total conversion to a log scale (so-called logarithmic pixel) or a mixed linear and logarithmic response region in the pixel. These approaches have several major drawbacks. First, the knee point in linear-to-log transition is difficult to control leading to fixed pattern noise in the output image. Second, under low light the log portion of the circuit is slow to respond leading to lag. Third, a logarithmic representation of the signal in the voltage domain (or charge domain) means that small variations in signal due to fixed pattern noise leads to large variations in the represented signal.
Linear approaches have also been used to increase dynamic range where the integration time is varied during a frame capture to generate several different integrated pixel signals. In the context of a CMOS pixel, integration time refers to the time period during which a capacitor or charge well accumulates a charge or discharges a voltage from a pre-charge level (i.e., from a reset voltage level) as a result of the photosensor's exposure to incident light. The integrated signal is then read-out and sampled. If a pixel's stored charge rises or falls to a point where it cannot further increase or decrease during the integration period, then it is said that the pixel has reached its saturation point.
FIG. 2 illustrates a portion of a conventional imager device 50 that uses a dual sampling, dual output approach for increasing intrascene dynamic range. The device 50 is described by Yadid-Pecht et al. in “Wide Intrascene Dynamic Range CMOS APS Using Dual Sampling”, IEEE Transactions on Electron Devices, Vol. 44, No. 10, pp. 1721–23, October 1997. The device 50 includes an array 60 of pixel cells 10 and two column parallel readout chains 54, 56. In operation, a first row of pixels ROW N is copied into the first readout chain 54 and is reset during the process. Immediately after this operation, a second row ROW N-D is copied into the second readout chain 56 (also reset during the process). The readout chains 54, 56 are scanned and pixel signals are read out and fused off-chip.
Although the device 50 has increased intrascene dynamic range, it requires an additional readout chain 56, large die size and multiple input/output (I/O) pins, which are undesirable. Accordingly, there is a desire and need for an imager and method of operating the imager that increases dynamic range without increasing die size and the number of I/O pins used by the imager.